"We need the ecosystem to be ready for FinFETs, which means design tools, IP, design kits and so on. For us 20-nm will be planar," said Maria Marced, president of TSMC Europe, in an interview with EETimes web-site.
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Monday 16 May 2011
TSMC Does Not See Triple-Gate Transistors as Economically Viable Solution
Taiwan Semiconductor Manufacturing Company said that while Intel Corp's 22nm manufacturing technology with tri-gate transistors has a number of advantages, it has no plans to implement something similar in the generations to come.
"We need the ecosystem to be ready for FinFETs, which means design tools, IP, design kits and so on. For us 20-nm will be planar," said Maria Marced, president of TSMC Europe, in an interview with EETimes web-site.
"We need the ecosystem to be ready for FinFETs, which means design tools, IP, design kits and so on. For us 20-nm will be planar," said Maria Marced, president of TSMC Europe, in an interview with EETimes web-site.
Labels:
22nm,
Economically,
Gate,
Intel,
Solution,
Transistiors,
Triple,
TSMC,
Viable
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